Tektronix GB1400 GigaBERT Test Set, 1400MHz

Features

The GB1400 operates at bit rates up to 1400 Mb/s. The GB700 operates at bit rates up to 700 Mb/s. These instruments are cost-effective for lower-speed applications today and will accommodate your future high-speed requirements as well.

The GB1400 generates low-jitter, symmetrical waveforms over its entire operating frequency range. The clock and data ports provide both true and inverted output signals. The instrument can drive single-ended or differential ECL inputs. The GB700 also drives PECL inputs and also provides levels suitable for TTL inputs.

The GB1400 can generate pseudo-random bit sequences (PRBS) up to 2²³-1 bits and others optional in length, user-programmable patterns. Patterns can be created locally using setup menus or externally by using a workstation or PC. A PC Windows-based Pattern Editor software package comes with the 1 M Memory Option. Externally created patterns can be downloaded via the GPIB or RS-232 port. All user patterns are saved in battery-backed RAM.

The GB700 can generate pseudo-random bit sequences (PRBS) up to 2²³-1 bits in length or user-programmable patterns containing up to 128 Kbits so the user can effectively simulate live traffic or "worst case" patterns. Patterns can be created locally using setup menus or externally by using a workstation or PC. A PC Windows-based Pattern Editor software package comes with the GB700.

The clock and data ports on the GB1400 Error Detector accept both true and inverted inputs. Single-ended or differential signals can be internally terminated. Input data delay is adjustable to accommodate different clock and data signal path delays.

Auto search greatly simplifies the Error Detector setup. The GB1400 Error Detector automatically synchronizes to the incoming signal by 1) Setting the input data decision voltage to its optimum value; 2) Adjusting input data delay for an optimum clock/data phase relationship; 3) Selecting the correct PRBS test pattern; and 4) selecting the correct pattern polarity (normal or inverted).

It synchronizes with any pattern sourced by a gigaBERT Pattern Generator. It can perform a bit-by-bit comparison of an arbitrary signal with an external Reference input. Thus the GB1400 can perform bit error analysis on any data pattern with a known good reference pattern.

Not only will the GB1400 and GB700 Error Detectors synchronize with any pattern sourced by a gigaBERT Pattern Generator, they can perform a bit-by-bit comparison and bit error analysis on an arbitrary signal if provided with a known good external Reference data stream.

Moreover, the GB1400 calculates errored seconds (ES), percentage error-free seconds (%EFS), severely-errored seconds (SES), degraded minutes (DM), unavailable seconds (US) and loss of signal (LOS) seconds. All bit error results - including the three BER measures - are calculated simultaneously and may be displayed during a test or after a test has been completed. A hard copy of all test results can be generated locally by connecting a printer to the parallel printer port or GPIB or RS-232 port. Reports may be printed when an error is detected, at the end of test intervals or both.

The GB700 performs a full-rate, bit-by-bit analysis of the received signal. Bit error results are then used to calculate three bit error rate (BER) measures. Total BER is calculated from the last power-on or reset. Window BER is calculated over a sliding window specified in terms of time (1 second to 24 hours) or bits (1⁸- to 1¹⁶-Bit). Test BER is calculated from the start of the current test.

The GB1400 and GB700 provide easy operation augmented by set-up store and recall. Clear, concise LCD displays of setup and results make it easy to use.

The 1 MB memory option (GB1400 only) for both the Pattern Generator and the Error Detector is sufficient for storing and outputting complex data such as SONET frames, ATM cells, MPEG digital video, etc, allowing designers to simulate "live" traffic. The GB1400 and GB700 Pattern Generators and Error Detectors can be controlled via the GPIB or RS-232 interface ports. The gigaBERT remote command set includes commands for all setup menus and front panel selections. The status of front panel indicators and test results can be remotely accessed.

BURST mode allows for operation with non-continuous external clocks. Use of BURST mode requires ECL-level signals with a minimum rate during the burst of 150 kHz. This is an option on the GB1400.

Frequency Range -
Internal Clock Source: 1 Mb/s to 1400 Mb/s.
External Clock with BURST Mode: 150 Kb/s to 1400 Mb/s.

Freq. Resolution (Internal Clock) - 10 kHz.

Clock Output Amplitude -
500 mV to 2.0 Vp-p in 50 mV steps.
500 mV to 2.8 V with PECL opt.

Clock Output Offset -
2.0 V to 1.0 V in 50 mV steps.
2.0 V to 1.8 V with PECL opt.

Data Output Amplitude -
500 mV to 2.0 V in 50 mV steps.
500 mV to 2.8 V with PECL opt.

Data Output Offset -
2.0 V to 1.0 V in 50 mV steps.
2.0 V to 1.8 V with PECL opt.

Data Delay Range - ±4 ns.

Data Delay Increments - 5 ps.

Clock Delay - ±4 ns.

Clock Delay Increments - 5 ps.

Std. Programmable Memory - 16-Bit.

Optional Memory - 1 Mbit.

PRBS Patterns (2ⁿ -1) - 7,15,17,20,23.

Burst Mode (ECL Levels Only) - Optional.

Frequency Range -
1 Mb/s to 1400 Mb/s.
150 Kb/s to 1400 Mb/s (with BURST Mode).

Clock Input Levels (Max.) - 500 mV to 1.5 Vp-p.

Clock Input Terminations - GND, AC, -2 Vp-p.

Clock Input Threshold - Fixed threshold levels.

Data Input Level (Max.) - 500 mV to 1.5 Vp-p (does not support PECL).

Data Input Threshold - 1.5 V to 1.0 V in 50 mV steps

Data Input Terminations -
GND, AC, -2 V.
Single-ended or differential operation for clock and data inputs.

Safety - EN61010-1

Frequency Range -
Internal Clock Source: 150 Kb/s to 705 Mb/s.
External Clock: 150 Kb/s to 705 Mb/s.

Freq. Resolution (Internal Clock) - 1 kHz.

Clock Output Amplitude - 500 mV to 2.0 Vp-p in 50 mV steps.

Clock Output Offset - 2.0 V to 1.8 V in 50 mV steps.

Data Output Amplitude - 500 mV to 2.0 Vp-p in 50 mV steps.

Data Output Offset - 2.0 V to 1.8 V in 50 mV steps.

Data delay range - ±4 ns.

Data Delay Increments - -20 ps.

Clock Delay - ±4 ns.

Clock Delay Increments - -20 ps.

Std. Programmable Memory - 128 Kbits.

Optional Memory - None.

PRBS Patterns (2ⁿ -1) - 7, 15, 17, 20, 23.

Burst Mode (ECL Levels Only) - Standard Feature.

Frequency Range With Burst Mode - 150 Kb/s to 705 Mb/s.

Burst Mode (ECL Levels Only) - Standard Feature.

Clock Input Levels (Max.) - 500 mV to 6.0 Vp-p.

Clock Input Terminations - GND, AC, -2 V, +3 V.

Clock Input Threshold - 3.00 to +4.5 V in 50 mV steps.

Data Input Level (Max.) - 500 mV to 6.0 Vp-p.

Data Input Threshold - 3.00 to +4.5 V in 50 mV steps.

Data Input Terminations -
GND, AC, -2 V, +3 V.
Single-ended or differential operation for clock and data inputs.