TEK TLA510 Logic Analyzer

Features

The TLA 500 Series has the performance necessary to solve the tough software/hardware integration and software debug problems previously available only in high-performance analysis systems.

The TLA 510 includes 100 channels (96 data and four clock) of 100 MHz acquisition. This is ideal for most single processor applications. The TLA 520 includes 200 channels of 100 MHz acquisition that can be divided to support two processors time correlated, or combined to support one advanced processor. The TLA 520 can optionally be configured as one 100 channel and one 50 channel acquisition. This is convenient when the integration task requires single processor support with separate, but time correlated, state or timing channels.

LAN Ethernet and RS-232 communication comes standard with each TLA 500. Optional and accessory application software offers full remote control capability across the LAN network.

The PowerFlex technology allows the TLA 500 to grow in memory depth and channels without throwing away major portions of your investment. The capability of the instrument can quickly and economically grow as the debug complexity of the target system increases.

All TLA 500 acquisition modules come standard with 8 K of memory. Synchronous acquisition memory depths of 32 K, 128 K, 512K and 2 M are optionally available. Both channel count and memory depth can be easily upgraded in the future using the PowerFlex capability.

Beyond the basic state and timing data displays there are four levels of disassembly display available with high level language symbols for software debug.

The Graph display plots acquired data value versus sequence. This is useful to spot errant software execution and for A/D display applications.

Both screen images and data files are efficiently printed. Postscript, LaserJet, PCX and BMP are all supported formats. The images can be output to either a local printer or a printer on the LAN network. Alternatively the images are stored in either a local file or transferred across the network to a remote file.

The TLA 510 offers optional 50 MHz algorithmic pattern generation support TTL signals with Tristate. The 18 channels of TTL signals, with Tristate, can be programmed with specific data values or driven from internal registers that can be loaded, incremented and decremented. Robust branching and looping capability allows full programming of up to 1,000 sequences.

Optional accessory probes are available to control the program sequencing from external events and/or add fully programmable pulse timing capability. ECL probe capability is also available.

The pattern generator can be used to simulate hardware that is not available or real-time events on an external bus. It can also inject real-time faults into a target for system analysis.

It has become vitally important to know how well your embedded system is performing. The optional performance analysis software charts a histogram of the percentage of execution time spent in each range of software. The screen updates rapidly and the ranges can be sorted while running. The display quickly shows where the bulk of the execution time is being spent. An alternate analysis mode displays a histogram of the range of time required for a particular event, e.g., interrupt latency.

Data can be sorted into 5,000 ranges allowing concise range placement. Data for the ranges can be imported directly from your computer, easing the definition of ranges. The output can be saved as an ASCII file for further analysis.

A robust set of pre-programmed triggers addresses the common types of desired trigger definitions. Just select the trigger type and enter the specific data, e.g., address value. Users can also define libraries of trigger definitions commonly used in their environment.

It is becoming increasingly important to connect the logic analyzer into the engineering network to maximize the efficiency of the debug and integration cycle. The TLA 500 series offers two levels of enterprise capability. An optional 17-inch X terminal display can replace the standard 15-inch model. The larger display provides a larger TLA 500 user interface or additional display room for other X applications across the network. The standard Telnet software provides remote log in to other workstations.

The second level of enterprise integration replaces the local X terminal display with a full interactive X display on the user’s workstation. The TLA 500 can be accessed, single user, from any X11 compatible workstation on the network.

Every TLA 500 is delivered to you with a full one year on-site service coverage. (This support may not be available in all geographic areas. Check with your local Tektronix sales engineer.) Measurement Service Options may be purchased to extend coverage to three or five years at the time you purchase your system.

The TLA 500 is compatible with a wide range of advanced application software.

The TLA 510 can be expanded by adding a module from the wide selection of DAS Centurion Acquisition modules and pattern generation modules.

Specifications

• 100 MHz State Analysis
• 400 Ms Timing Analysis
• 8 K to 8 M Acquisition Memory Depths
• 100, 150 and 200 Channel Widths Models
• High Performance RISC/CISC Microprocessor Support
• Advanced Performance Analysis
• Links to High Level Languages for Software Debug
• Compliant with CISPR IIA Radiated and Conducted Emissions Requirements
• 18-CH, 50 MHz Algorithmic Pattern Generator

Ordering Information

TEK TLA510 Logic Analyzer

Includes: LAN Ethernet and RS-232 Standard, 1.2 GB Hard Disk, 1.4 MB 3.5 in. Floppy Drive.

Opt. 01 - 32 K Memory.

Opt. 02 - 128 K Memory.

Opt. 03 - 512 K Memory.

Opt. 06 - 2M Memory.

Opt. 04 - Performance Analysis Software.

Opt. 30 - 18-CH, 50 MHz Pattern Generator

Opt. 1P - Add Additional Probe Accessories.

Opt. 1X - Sub. 92XTERM Networked System Software.

Opt. 8S - Sub. ECL Coax Cable.

Opt. IN - On-site Installation.

Opt. 4X - Sub. 17" X terminal.

Opt. 5C - Thicknet LAN connector.